DocumentCode :
2440059
Title :
Towards the verification of multi-diagram UML models
Author :
Motta, Alfredo
Author_Institution :
Dipt. di Elettron. e Inf., Politec. di Milano, Milano, Italy
fYear :
2012
fDate :
2-9 June 2012
Firstpage :
1531
Lastpage :
1534
Abstract :
UML is a general-purpose modeling language that offers a heterogeneous set of diagrams to describe the different views of a software system. While there seems to be a general consensus on the semantics of some individual diagrams, the composite semantics of the different views is still an open problem. During my PhD I am considering a significant and consistent set of UML diagrams, where timed-related properties can be modeled carefully, and I am ascribing them with a formal semantics based on metric temporal logic. The use of logic is aimed to help capture the composite semantics of the different views efficiently. The result is then used to feed a bounded model/satisfiability checker to allow users to verify these systems, even from the initial phases of the design. The final goal is to realize an advanced modeling framework where users can exploit both a well-known modeling notation and advanced verification capabilities seamlessly.
Keywords :
Unified Modeling Language; formal verification; temporal logic; advanced modeling framework; bounded model-satisfiability checker; composite semantics; formal semantics; general-purpose modeling language; metric temporal logic; multi-diagram UML model verification; software system; timed-related properties; Clocks; Computational modeling; Prototypes; Semantics; Software systems; Unified modeling language; UML; formal verification; temporal logic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Software Engineering (ICSE), 2012 34th International Conference on
Conference_Location :
Zurich
ISSN :
0270-5257
Print_ISBN :
978-1-4673-1066-6
Electronic_ISBN :
0270-5257
Type :
conf
DOI :
10.1109/ICSE.2012.6227044
Filename :
6227044
Link To Document :
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