• DocumentCode
    244009
  • Title

    Multi-level, Memory-Based Logic Using CMOS Technology

  • Author

    Dugganapally, Indira Priyadarshini ; Watkins, Steve E. ; Cooper, Benjamin

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Missouri Univ. of Sci. & Technol., Rolla, MO, USA
  • fYear
    2014
  • fDate
    9-11 July 2014
  • Firstpage
    583
  • Lastpage
    588
  • Abstract
    A memory-based approach is described for performing basic logic gate functions. CMOS transistors are used in a non-traditional way for multi-level operations and memory manipulation. Sense amplifier circuits drive an array of pass amplifiers in which memory values are set by reference connections. The combination of multi-level architectures and matrix algebra principles can create flexible, modular systems using standard fabrication methods. Logic gate functions of AND, OR, NAND, and NOR are implemented in quaternary, memory-based architectures. The circuit layouts and functional simulations are given and are compared to those of similar binary circuits. Experimental performance of a hardware AND chip is also demonstrated. The approach requires more chip area for basic logic gates, but it grows increasingly efficient for more complex systems through hardware reuse. The benefits and feasibility of more complex applications are discussed.
  • Keywords
    CMOS logic circuits; integrated circuit layout; integrated memory circuits; logic gates; AND gate; CMOS technology; CMOS transistors; NAND gate; NOR gate; OR gate; basic logic gate functions; circuit layouts; matrix algebra; memory-based logic; multilevel architectures; multilevel logic; sense amplifier circuits; Arrays; CMOS integrated circuits; CMOS technology; Logic gates; Transistors; Voltage control; CMOS; Multi-level logic; digital ICs; memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on
  • Conference_Location
    Tampa, FL
  • Print_ISBN
    978-1-4799-3763-9
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2014.91
  • Filename
    6903427