DocumentCode :
2440424
Title :
Improving the performance of program monitors with compiler support in multi-core environment
Author :
He, Guojin ; Zhai, Antonia
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of Minnesota, Minneapolis, MN, USA
fYear :
2010
fDate :
19-23 April 2010
Firstpage :
1
Lastpage :
12
Abstract :
Dynamic program execution monitors allow programmers to observe and verify an application while it is running. Instrumentation-based dynamic program monitors often incur significant performance overhead due to instrumentation. Special hardware supports have been proposed to reduce this overhead. However, these supports mostly target specific monitoring requirements and thus have limited applicability. Recently, with multi-core processors becoming mainstream, executing the monitored program and the monitor simultaneously on separate cores has emerged as an attractive option. However, communication between the two often becomes the new performance bottleneck due to large amounts of information forwarded to the monitor. In this paper, we present compiler techniques that aim to minimize the communication overhead. Our proposal is based on the observations that a monitor only requires specific information from the monitored programs and some information can be easily computed by the monitor from data that have already been communicated. We developed a code generator and optimization techniques to decide the set of data items to forward and the set to compute, so that the total execution time of the monitor is minimized. Our compiler can optimize a variety of monitors with diverse monitoring requirements, taking as input the control flow graph of the monitored program and the set of data that needs verification. Using a static binary rewriter, we evaluate the performance impact of the proposed compiler techniques on the SPEC2006 integer benchmarks for two intensive monitoring tasks: taint-propagation and memory bug detection. Comparing to instrumentation-based monitors, the proposed techniques can bring down the performance overhead of the two monitors from 10.6× and 9.0× to 2.36× and 2.17×, respectively.
Keywords :
flow graphs; multiprocessing systems; optimisation; program compilers; system monitoring; code generator; compiler support; control flow graph; dynamic program execution monitors; instrumentation-based dynamic program monitors; memory bug detection; monitoring requirements; multi-core environment; multi-core processors; optimization technique; static binary rewriter; taint-propagation; Application software; Computer architecture; Computer displays; Hardware; Instruments; Monitoring; Multicore processing; Optimizing compilers; Program processors; Security; compiler optimization; multi-core; program distilling; program execution monitor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel & Distributed Processing (IPDPS), 2010 IEEE International Symposium on
Conference_Location :
Atlanta, GA
ISSN :
1530-2075
Print_ISBN :
978-1-4244-6442-5
Type :
conf
DOI :
10.1109/IPDPS.2010.5470405
Filename :
5470405
Link To Document :
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