DocumentCode
2440981
Title
MMT: Exploiting fine-grained parallelism in dynamic memory management
Author
Tiwari, Devesh ; Lee, Sanghoon ; Tuck, James ; Solihin, Yan
Author_Institution
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear
2010
fDate
19-23 April 2010
Firstpage
1
Lastpage
12
Abstract
Dynamic memory management is one of the most expensive but ubiquitous operations in many C/C++ applications. Additional features such as security checks, while desirable, further worsen memory management overheads. With advent of multicore architecture, it is important to investigate how dynamic memory management overheads for sequential applications can be reduced. In this paper, we propose a new approach for accelerating dynamic memory management on multicore architecture, by offloading dynamic management functions to a separate thread that we refer to as memory management thread (MMT). We show that an efficient MMT design can give significant performance improvement by extracting parallelism while being agnostic to the underlying memory management library algorithms and data structures. We also show how parallelism provided by MMT can be beneficial for high overhead memory management tasks, for example, security checks related to memory management. We evaluate MMT on heap allocation-intensive benchmarks running on an Intel core 2 quad platform for two widely-used memory allocators: Doug Lea´s and PHKmalloc allocators. On average, MMT achieves a speedup ratio of 1.19?? for both allocators, while both the application and memory management libraries are unmodified and are oblivious to the parallelization scheme. For PHKmalloc with security checks turned on, MMT reduces the security check overheads from 21% to only 1% on average.
Keywords
data structures; multiprocessing systems; storage management; Doug Lea allocator; Intel core 2 quad platform; PHKmalloc allocator; data structures; dynamic memory management; fine-grained parallelism; heap allocation; memory allocators; memory management library; memory management thread; multicore architecture; security checks; sequential applications; Application software; Delay; Engineering management; Libraries; Memory management; Multicore processing; Parallel processing; Security;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel & Distributed Processing (IPDPS), 2010 IEEE International Symposium on
Conference_Location
Atlanta, GA
ISSN
1530-2075
Print_ISBN
978-1-4244-6442-5
Type
conf
DOI
10.1109/IPDPS.2010.5470428
Filename
5470428
Link To Document