• DocumentCode
    2441047
  • Title

    An experimental and theoretical consideration of physical design parameters in field-induced charged device model ESD simulators and their impact upon measured withstand voltages

  • Author

    Carey, R.E. ; DeChiaro, L.F.

  • Author_Institution
    Microelectron. Group, Lucent Technol., Reading, PA, USA
  • fYear
    1998
  • fDate
    6-8 Oct. 1998
  • Firstpage
    40
  • Lastpage
    53
  • Abstract
    The effects of changing the physical design parameters of field-induced charged device model (FCDM) ESD simulators have been investigated experimentally and theoretically. The most critical parameter is the DUT-to-field plate spacing, followed by the DUT surface area. Total inductance is also important if the discharge loop is underdamped. These effects can help explain the differences observed between results achieved with the ESDA and JEDEC test modules and will assist the FCDM standardization effort.
  • Keywords
    circuit simulation; electrostatic discharge; inductance; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; modules; standardisation; standards; surface charging; DUT surface area; DUT-to-field plate spacing; ESDA test modules; FCDM ESD simulators; FCDM standardization; JEDEC test modules; field-induced CDM ESD simulators; field-induced charged device model ESD simulators; inductance; physical design parameters; underdamped discharge loop; withstand voltages; Biological system modeling; Current measurement; Dielectric measurements; Electric variables; Electrostatic discharge; Inductance; Integrated circuit modeling; Predictive models; Testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 1998
  • Conference_Location
    Reno, NV, USA
  • Print_ISBN
    1-878303-91-0
  • Type

    conf

  • DOI
    10.1109/EOSESD.1998.737020
  • Filename
    737020