DocumentCode :
2441391
Title :
Retention time of novel charge trapping memories using Al/sub 2/O/sub 3/ dielectrics
Author :
Specht, M. ; Reisinger, H. ; Städele, M. ; Hofmann, F. ; Gschwandtner, A. ; Landgraf, E. ; Luyken, R.J. ; Schulz, T. ; Hartwich, J. ; Dreeskornfeld, L. ; Rösner, W. ; Kretz, J. ; Risch, L.
Author_Institution :
Corporate Res. CPR ND, Infineon Technol. AG, Germany
fYear :
2003
fDate :
16-18 Sept. 2003
Firstpage :
155
Lastpage :
158
Abstract :
Replacing oxide-nitride-oxide (ONO) dielectrics in charge trapping memories such as SONOS (silicon/ONO/silicon) and NROM (nitrided read only memory) by high-k materials potentially offers improved scaling properties of the devices. In particular, a high dielectric constant of at least one of the three layers allows one to reduce the total equivalent oxide thickness (EOT) thus achieving the same programming electric field as in ONO stacks at reduced voltage. In this study, we evaluate the retention time of charge trapping memories using Al/sub 2/O/sub 3/ as a trapping dielectric and as a control gate dielectric. We find sufficiently large shifts of the threshold voltage allowing for retention times of more than ten years for the Al/sub 2/O/sub 3/ charge trapping memories. High-temperature annealed, polycrystalline layers are found to be more useful than amorphous layers annealed at 400-600/spl deg/C due to better retention time, smaller EOT and flat band shifts and a smaller amount of fixed interface charges.
Keywords :
alumina; annealing; dielectric thin films; integrated memory circuits; read-only storage; 10 year; Al/sub 2/O/sub 3/; EOT; NROM; ONO dielectrics; SONOS; charge trapping memories; control gate dielectric; fixed interface charges; flat band shifts; high-k dielectrics; high-temperature annealed layers; memory retention time; nitrided read only memory; oxide-nitride-oxide dielectrics; polycrystalline layers; programming electric field; silicon/ONO/silicon; total equivalent oxide thickness; trapping dielectric; Aluminum oxide; Annealing; Atomic layer deposition; Dielectric devices; High K dielectric materials; High-K gate dielectrics; Neodymium; SONOS devices; Silicon compounds; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7999-3
Type :
conf
DOI :
10.1109/ESSDERC.2003.1256834
Filename :
1256834
Link To Document :
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