Electrical characterisation of crystalline praseodymium oxide high-k gate dielectric MOSFETs

Author

Schwalke, U. ; Stefanov, Y. ; Komaragiri, R. ; Ruland, T.

Author_Institution

Inst. fur Halbleitertechnik, Tech. Univ. Darmstadt, Germany

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

243

Lastpage

246

Abstract

We have successfully completed the process integration of crystalline praseodymium oxide (Pr/sub 2/O/sub 3/) high-k gate dielectric in order to fabricate fully functional Pr/sub 2/O/sub 3/ MOSFETs with gate leakages <10/sup -6/ A/cm/sup 2/. Gate leakage is found to be size dependent and may be related to defects at Pr/sub 2/O/sub 3/ grain boundaries. Although fully functional, Pr/sub 2/O/sub 3/ NMOS transistors showed a lower performance when compared to conventional SiO/sub 2/ MOSFETs with the same EOT. The performance degradation is attributed to mobility reduction due to large amounts of trapped charges. In addition, a reversible Vt-instability is observed, even at operating conditions. These results suggest that charging/discharging of defects via tunneling within Pr/sub 2/O/sub 3/ and near the interfaces is a likely mechanism.

Keywords

MOSFET; carrier mobility; dielectric thin films; grain boundaries; leakage currents; praseodymium compounds; tunnelling; EOT; MOSFET; NMOS transistors; Pr/sub 2/O/sub 3/; crystalline praseodymium oxide gate dielectric; defect charging; defect discharging; gate leakage; grain boundaries; high-k gate dielectrics; mobility reduction; reversible Vt-instability; trapped charges; tunneling; Annealing; Crystallization; Gate leakage; Grain boundaries; High K dielectric materials; High-K gate dielectrics; Leakage current; MOSFETs; Molecular beam epitaxial growth; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7999-3

Type

conf

DOI

10.1109/ESSDERC.2003.1256859

Filename

1256859