DocumentCode
2442264
Title
Optimisation of metal connections in lateral DMOS transistors for driving applications
Author
Gassot, P. ; Desoete, B. ; Gillon, R. ; Bolognesi, D. ; Tack, M.
Author_Institution
AMI Semicond., Oudenaarde, Belgium
fYear
2003
fDate
16-18 Sept. 2003
Firstpage
327
Lastpage
330
Abstract
This paper presents the optimisation of the routing of multi-finger current drivers, based on lateral DMOS transistors, for switching applications, in order to limit the metal contribution. to the total driver on-resistance. The metal2 collecting current from the device fingers out of the source and drain, is shown to be the major contributor to the added series resistance for all aspect ratios, as long as the number of metal2 tracks is large enough. The experimental characterisation of the metal connection influence on the device on-resistance is successfully supported by circuit simulations, based on a lumped resistor network model of the driver.
Keywords
field effect transistor switches; lumped parameter networks; optimisation; power MOSFET; power semiconductor switches; semiconductor device measurement; semiconductor device metallisation; semiconductor device models; device fingers metal2 collecting current; driver on-resistance; lateral DMOS transistors; lumped resistor network model; metal connection optimisation; multifinger current driver routing; multifinger transistors; series resistance; switching transistors; Ambient intelligence; CMOS technology; Circuit simulation; Contact resistance; Driver circuits; Fingers; Resistors; Routing; Semiconductor device modeling; Shape;
fLanguage
English
Publisher
ieee
Conference_Titel
European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on
Conference_Location
Estoril, Portugal
Print_ISBN
0-7803-7999-3
Type
conf
DOI
10.1109/ESSDERC.2003.1256880
Filename
1256880
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