Parasitic capacitance modeling for TFT liquid crystal displays

The problem of calculating parasitic capacitances between two interconnects is investigated dedicatedly for TFT liquid crystal displays, with the main focus put on the approximate expressions of the capacitances caused at intersections and parallel runs of interconnects. To derive a simple and accurate approximate expression, the interconnects in such a structure are divided into a few basic coupling regions such that with the use of a 2D model the capacitance in-each region can be calculated by an electro-magnetic field solver. The total capacitance attained by summing the capacitances of these regions proves to be approximated within a relative error of 5% as compared with that obtained by using a 3D field solver.