Analysis and design of driving waveforms for ac PDPs driven by three wall charge states [plasma display panels]

In this work, we made an optimization effort on the driving waveforms for quantized memory addressing which expresses grey levels by a combination of pulse width modulation and amplitude modulation. We used three wall charge states for simplicity and forms for selective write optimized both the driving wave and selective erase mode of operation. For the selective write mode, it was necessary to add long ramp type erase pulses after the total write pulse and the sustain period to obtain stable intermediate luminance discharges. Furthermore, fast rising ramp type total write was adopted for better discharge stability. Compared to the selective write driving mode, the selective erase mode achieved a flicker free half-ON state with much simpler driving waveforms. We believed that this improvement was possible since the cells were entering the address period with enough wall charges to easily modulate with.