Effects of low-temperature water vapor annealing of strained SiGe surface-channel pMOSFETs with high-/spl kappa/ dielectric

Author

Westlinder, J. ; Sjöblom, G. ; Wu, D. ; Hellström, P.E. ; Olsson, Jimmy ; Zhang, S.-L. ; Östling, M.

Author_Institution

The Angstrom Lab., Uppsala Univ., Sweden

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

525

Lastpage

528

Abstract

A significant reduction of negative oxide charges is observed in strained SiGe channel pMOSFETs, utilizing ALD high-k-gate dielectrics, after low temperature water vapor annealing. The negative charges may originate from non-bridging oxygen bonds in the dielectrics, which are passivated after the water vapor annealing. However, the subthreshold slope is not changed with the 300/spl deg/C annealing, which indicates that interface states are not affected.

Keywords

Ge-Si alloys; MOSFET; annealing; dielectric thin films; interface states; passivation; semiconductor materials; 300 degC; ALD high-k gate dielectrics; SiGe; interface states; low-temperature water vapor annealing; negative oxide charge reduction; nonbridging oxygen bonds; passivation; strained SiGe surface-channel pMOSFET; subthreshold slope; Annealing; Dielectric materials; Germanium silicon alloys; High K dielectric materials; High-K gate dielectrics; MOSFETs; Oxidation; Silicon germanium; Temperature; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7999-3

Type

conf

DOI

10.1109/ESSDERC.2003.1256929

Filename

1256929