Low-Power Saturated Arithmetic and its Application in VLSI Architectures for OFDM Modems

The impact or a modified saturated arithmetic on power dissipation and signal quality produced by building blocks of a multicarrier modem is studied in this paper. The proposed simplified saturation scheme is shown to significantly reduce the switching activity of the arithmetic circuits, while it requires reduced hardware complexity for its implementation. Power estimation of synthesized circuits reveals power savings of up to 20%, depending on signal quality. The proposed saturation scheme is shown to moderately increase the power of noise, therefore leaving signal quality practically unaffected. The applicability of the proposed saturation is demonstrated by quantifying signal noise power behavior for various types of digital filters and radix-2 FFT structures suitable for OFDM modems