DocumentCode
2444099
Title
An improved min-sum based column-layered decoding algorithm for LDPC codes
Author
Jun Lin ; Jin Sha ; Wang, Zhongfeng ; Li, Li
Author_Institution
Inst. of VLSI design, Nanjing Univ., Nanjing, China
fYear
2009
fDate
7-9 Oct. 2009
Firstpage
238
Lastpage
242
Abstract
Low-density parity-check code is a kind of near-optimal error correction code. Developing a highly efficient decoding algorithm is the main challenge of the implementation of LDPC code. In this paper, based on the min-sum column-layered decoding algorithm, a new selective computation technique is proposed to reduce the number of comparisons. With the presented decoding algorithm, the total number of floating number comparisons can be reduced dramatically (range from 81% to 91%) at the cost of negligible hardware overhead. Simulation results show that the decoding performance and iteration times are almost the same as the original column-layered decoding algorithm.
Keywords
decoding; error correction codes; parity check codes; LDPC code; low-density parity-check code; min-sum column-layered decoding algorithm; near-optimal error correction code; Decoding; Parity check codes; Low-density parity-check (LDPC) codes; VLSI; column-layered decoding; error correction codes; shuffled decoding;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems, 2009. SiPS 2009. IEEE Workshop on
Conference_Location
Tampere
ISSN
1520-6130
Print_ISBN
978-1-4244-4335-2
Electronic_ISBN
1520-6130
Type
conf
DOI
10.1109/SIPS.2009.5336258
Filename
5336258
Link To Document