Title :
Hardware architecture design of frame rate up-conversion for high definition videos with global motion estimation and compensation
Author :
Hsu, Kung-Yen ; Chien, Shao-Yi
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
Frame rate up-conversion (FRUC) with motion compensated interpolation (MCI) is a key operation for motion blur reduction on liquid crystal displays, and dedicated hardware engine design is necessary. In this paper, a hardware architecture for real-time FRUC applications is designed with global motion estimation and compensation. With the concept of motion estimation in low resolution and motion compensation in high resolution, and redesigning several memory bandwidth-hungry modules, a previous work, global-to-local iterative MCI, is modified for hardware design with similar subjective performance. Next, a high-throughput global motion estimation (GME) engine is designed with subsampling technique and parallel hardware architecture, and global motion compensated interpolation and moving block classifier are both designed by sharing the hardware with GME. Moreover, a motion estimation engine is also designed to support various local motion estimation algorithms in different stages. Implementation results show that the proposed GME engine can achieve much higher specifications with limited hardware cost increase. Furthermore, the proposed FRUC design can generate 60 1920 × 1080 interpolated frames per second with the gate count of 1.3M and on-chip memory size of 99kb.
Keywords :
image classification; image restoration; interpolation; liquid crystal displays; motion compensation; motion estimation; parallel architectures; video signal processing; FRUC; GME; MCI; frame rate up-conversion; global motion estimation; hardware engine design; liquid crystal displays; motion blur reduction; motion compensated interpolation; moving block classifier; on-chip memory; parallel hardware architecture; subsampling technique; video processing; Algorithm design and analysis; Arrays; Engines; Hardware; Interpolation; Motion estimation; Frame rate up-conversion (FRUC); global motion estimation; global-to-local; hardware architecture; motion blur; motion compensated interpolation (MCI);
Conference_Titel :
Signal Processing Systems (SiPS), 2011 IEEE Workshop on
Conference_Location :
Beirut
Print_ISBN :
978-1-4577-1920-2
DOI :
10.1109/SiPS.2011.6088955