Title :
An Energy-Efficient Reconfigurable Baseband Processor for Flexible Radios
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana-Champaign, IL
Abstract :
Most existing techniques for reconfigurable processors focus on the computation model. This paper focuses on increasing the granularity of configurable units without compromising flexibility. This is carried out by matching the granularity to the degree-of-freedom (DOF) processing in most wireless systems. A design flow that accelerates the exploration of tradeoffs among various micro-architecture for the configurable unit is discussed. A prototype processor is implemented using the Intel 0.13 mum CMOS low-power standard cell library. The estimated energy efficiency is on the same order of dedicated hardware implementations
Keywords :
CMOS integrated circuits; reconfigurable architectures; software radio; 0.13 micron; Intel CMOS low-power standard cell library; degree-of-freedom processing; energy-efficient reconfigurable baseband processor; microarchitecture; Acceleration; Baseband; CMOS process; Computational modeling; Computer aided instruction; Energy efficiency; Hardware; Libraries; Prototypes; VLIW;
Conference_Titel :
Signal Processing Systems Design and Implementation, 2006. SIPS '06. IEEE Workshop on
Conference_Location :
Banff, Alta.
Print_ISBN :
1-4244-0383-9
Electronic_ISBN :
1520-6130
DOI :
10.1109/SIPS.2006.352615
