Title :
On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems
Author :
Yu, Tzu-Hao ; Yu, Chi-Li ; Jheng, Kai-Yuan ; Wu, An-Yeu Andy
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Abstract :
A novel on-line mixed-scaling-rotation CORDIC (MSR-CORDIC) VLSI architecture is proposed. This architecture not only maintains the scaling-free property of the original MSR-CORDIC, but also achieves the target of on-line angle computation. Compared with other existing CORDIC solutions, the proposed architecture is faster and more cost-efficient, especially for QRD-RLS filtering systems. Moreover, this on-line MSR-CORDIC can also be adopted by other rotation-based DSP applications
Keywords :
VLSI; adaptive filters; digital arithmetic; coordinate rotational digital computer algorithm; on-line MSR-CORDIC VLSI architecture; rotation-based adaptive filtering system; scaling-free property; Adaptive filters; Computer architecture; Costs; Delay; Digital signal processing; Filtering; Hardware; Iterative algorithms; Maintenance engineering; Very large scale integration;
Conference_Titel :
Signal Processing Systems Design and Implementation, 2006. SIPS '06. IEEE Workshop on
Conference_Location :
Banff, Alta.
Print_ISBN :
1-4244-0382-0
Electronic_ISBN :
1520-6130
DOI :
10.1109/SIPS.2006.352620