Exploiting the Selfish Gene algorithm for evolving hardware cellular automata

Testing is a key issue in the design and production of digital circuits and the adoption of built-in self test techniques is increasingly popular. This paper shows an application in the field of electronic CAD of the Selfish Gene algorithm, an evolutionary algorithm based on a recent interpretation of the Darwinian theory. A three-phase optimization algorithm is exploited for determining the structure of a built-in self test architecture that is able to achieve good fault coverage results with a reduced area overhead. Experimental results show that the attained fault coverage is substantially higher than what can be obtained by previously proposed methods with comparable area requirements