DocumentCode
2445124
Title
Flexible product code-based ECC schemes for MLC NAND Flash memories
Author
Yang, C. ; Emre, Y. ; Chakrabarti, C. ; Mudge, T.
Author_Institution
Sch. of Electr., Comput. & Energy Eng., Arizona State Univ., Tempe, AZ, USA
fYear
2011
fDate
4-7 Oct. 2011
Firstpage
255
Lastpage
260
Abstract
Error control coding (ECC) is essential for correcting soft errors in Flash memories. In such memories, as the number of erase/program cycles increases over time, the number of errors increases. In this paper we propose a flexible product code based ECC scheme that can support ECC of higher strength when needed. Specifically, we propose product codes which use Reed-Solomon (RS) codes along rows and Hamming codes along columns. When higher ECC is needed, the Hamming code along columns is replaced by two shorter Hamming codes. For instance, when the raw bit error rate increases from 2.2*10-3 to 4.0*10-3, the proposed ECC scheme migrates from RS(127, 121) along rows and Hamming(72,64) along columns to RS(127, 121) along rows and two Hamming(39, 32) along columns to achieve the same BER of 10-6. While the resulting implementation has 12% higher decoding latency, it increases the lifetime of the device significantly.
Keywords
Hamming codes; NAND circuits; Reed-Solomon codes; decoding; error correction codes; error statistics; flash memories; product codes; BER; Hamming codes; MLC NAND flash memories; RS codes; Reed-Solomon codes; bit error rate; decoding latency; erase-program cycles; error control coding; flexible product code-based ECC schemes; multilevel cell; soft errors correction; Bit error rate; Decoding; Encoding; Error correction codes; Flash memory; Hardware; Product codes; Flash memories; error correction codes; multi-level cell; product codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems (SiPS), 2011 IEEE Workshop on
Conference_Location
Beirut
ISSN
2162-3562
Print_ISBN
978-1-4577-1920-2
Type
conf
DOI
10.1109/SiPS.2011.6088985
Filename
6088985
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