An efficient Gaussian random number architecture for MIMO channel emulators

Gaussian random numbers (GRN) generators are indispensable components in channel emulators for producing multiplicative and additive noises. Efficient designs of these GRN generators are required for testing the newest communications standards, which consider multiple channels working at higher data rates. In this paper, a new reconfigurable architecture for the generation of GRN at each clock cycle is proposed. The design consists in the polynomial approximation of the inverse method, implemented through parallel computing techniques using processor arrays. Time and area analysis carried out show a performance improvement when compared with previous works. Finally, the architecture´s statistical performance was corroborated in QAM-VBLAST transmission scheme.