DocumentCode :
2445404
Title :
An encoding scheme and encoder architecture for rate-compatible QC-LDPC codes
Author :
Mahdi, Ahmed ; Kanistras, Nikos ; Paliouras, Vassilis
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece
fYear :
2011
fDate :
4-7 Oct. 2011
Firstpage :
328
Lastpage :
333
Abstract :
We consider the problem of rate-compatible (RC)-encoder and RC-puncturing of LDPC codes. The proposed encoder is based on a modification of MacKay encoding scheme. The introduced modification enables the application of MacKay scheme for quasi-cyclic (QC) LDPC codes combined with a proposed matrix puncturing scheme based on an also proposed parity-check matrix construction to achieve code-rate compatibility. The proposed encoding scheme and VLSI encoder architecture address the problem of encoding complexity, since about 80% of MacKay encoding algorithm complexity is linearly depended on LDPC check node degree. The proposed matrix puncturing scheme can produce good BER performance especially for high puncturing rates, where only a few parity check symbols are transmitted. A comparison with prior art in puncturing is offered, which shows superior performance of the proposed scheme, in terms of coding gain without any hardware cost.
Keywords :
cyclic codes; encoding; error statistics; parity check codes; BER performance; MacKay encoding scheme; RC; code-rate compatibility; encoding scheme; matrix puncturing scheme; parity-check matrix construction; quasi-cyclic codes; rate-compatible QC-LDPC code; rate-compatible-encoder architecture; Complexity theory; Decoding; Encoding; Iterative decoding; Noise; Vectors; LDPC encoding; hardware architecture; quasi-cyclic LDPC; rate-compatible code;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems (SiPS), 2011 IEEE Workshop on
Conference_Location :
Beirut
ISSN :
2162-3562
Print_ISBN :
978-1-4577-1920-2
Type :
conf
DOI :
10.1109/SiPS.2011.6088997
Filename :
6088997
Link To Document :
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