Title :
Low power analog chips for the computation of the maximal principal component
Author :
Salam, Fathi M A ; Vedula, Shanti S. ; Erten, Gamze
Author_Institution :
Artificial Neural Networks Lab., Michigan State Univ., East Lansing, MI, USA
fDate :
27 Jun-2 Jul 1994
Abstract :
Test results of two prototype circuit implementations that compute the maximal principal component are described. The implementations are designed to be compact and operate in the subthreshold regime for low power consumption. The prototypes use direct realization of a nonlinear self-learning circuit models which we have developed
Keywords :
MOS analogue integrated circuits; analogue processing circuits; circuit feedback; image enhancement; neural chips; nonlinear network analysis; MOS circuit; analog chips; circuit feedback; image enhancement; maximal principal component; neural chips; nonlinear self-learning circuit models; principal component analysis; Analog computers; Circuit testing; Computer networks; Equations; Feedback circuits; Power engineering computing; Principal component analysis; Prototypes; Transconductance; Voltage;
Conference_Titel :
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1901-X
DOI :
10.1109/ICNN.1994.375042
