A low voltage, 10-2550MHz, 0.15/spl mu/ CMOS, process and divider modulus independent PLL using zero-VT MOSFETs

Author

Maxim, Adrian

Author_Institution

Integrated Products, Austin, TX, USA

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

105

Lastpage

108

Abstract

This paper presents a current-mode, feed-forward loop filter PLL architecture that uses a bandgap referencing technique to achieve a process independent damping factor. It requires no external loop filter settings and provides divider modulus independent loop time constants through the usage of linear-N dependent charge-pump currents. A low voltage operation is achieved with extensive usage of zero-VT MOSFETs throughout the signal path, while maintaining a tight process control of the time constants with RC defined products. The frequency synthesizer specifications include: 10-2550 MHz frequency range, 1.5V digital/1V analog supply voltage, sub 1% T/sub osc/ rms jitter, 35 mW power dissipation and 800 /spl times/ 200 /spl mu/m/sup 2/ die area.

Keywords

CMOS integrated circuits; MOSFET circuits; RC circuits; frequency synthesizers; low-power electronics; phase locked loops; 0.15 microns; 1.5 V; 10 to 2550 MHz; 35 mW; CMOS; PLL architecture; RC defined products; bandgap referencing technique; current-mode PLL; divider modulus independent PLL; divider modulus independent loop time constants; external loop filter settings; feed-forward loop filter; frequency synthesizer; linear-N dependent charge-pump currents; low voltage PLL; low voltage operation; process independent PLL; process independent damping factor; zero-VT MOSFET; CMOS process; Charge pumps; Damping; Feedforward systems; Filters; Frequency synthesizers; Low voltage; MOSFETs; Phase locked loops; Photonic band gap;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7995-0

Type

conf

DOI

10.1109/ESSCIRC.2003.1257083

Filename

1257083