DocumentCode :
2446604
Title :
A low-power entropy-coding analog/digital converter with integrated data compression
Author :
Peck, R. ; Schroeder, D.
Author_Institution :
Microelectron., TU Hamburg-Harburg, Hamburg, Germany
fYear :
2003
fDate :
16-18 Sept. 2003
Firstpage :
173
Lastpage :
176
Abstract :
A novel circuit architecture for integrated analog/digital converters (ADCs) is presented that allows exploiting the information-theoretic redundancy of the input signal for increasing the efficiency of operation. Analog/digital conversion and entropy-coding are combined in a single process such that integrated data compression as well as a low-power operation of the converter is obtained. A prototype ADC has been implemented in a 0.6 /spl mu/m CMOS process. Experimental results showing the performance of the converter as well as the achieved compression ratios and power savings are discussed.
Keywords :
CMOS integrated circuits; analogue-digital conversion; data compression; entropy codes; low-power electronics; redundancy; 0.6 microns; CMOS process; circuit architecture; compression ratios; entropy-coding analog-digital converter; information-theoretic redundancy; input signal; integrated analog-digital converters; integrated data compression; low-power analog-digital converter; low-power operation; power savings; Analog-digital conversion; Batteries; CMOS process; Circuits; Data compression; Energy consumption; Information rates; Microelectronics; Prototypes; Quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
Type :
conf
DOI :
10.1109/ESSCIRC.2003.1257100
Filename :
1257100
Link To Document :
بازگشت