DocumentCode :
2447132
Title :
Stack protection unit as a step towards securing MPSoCs
Author :
Lukovic, Slobodan ; Pezzino, Paolo ; Fiorin, Leandro
Author_Institution :
Univ. of Lugano, Lugano, Switzerland
fYear :
2010
fDate :
19-23 April 2010
Firstpage :
1
Lastpage :
4
Abstract :
Reconfigurable technologies are getting popular as an instrument not only for verification and prototyping but also for commercial implementation of Multi-Processor System-on-Chip (MPSoC) architectures. These systems, in particular Network-on-Chip (NoC) based ones, have emerged as a design strategy to cope with increased requirements and complexity of modern applications. However, the increasing heterogeneity, coupled with possibility of reconfiguration, makes security become one of major concerns in MPSoC design. In this work, we show a solution for FPGA based designs against one of the most widespread types of attacks - code injection. Our response to tackle this challenge is given in form of Stack Protection Unit (SPU) embedded into processing cores. MicroBlaze soft-core processor serves as a case study for verification of the proposed solution in FPGA technology.
Keywords :
field programmable gate arrays; multiprocessing systems; network-on-chip; security of data; FPGA; MPSoCs security; MicroBlaze softcore processor; SPU; attack code injection; field programmable gate arrays; multiprocessor system-on-chip; network-on-chip; reconfigurable technologies; stack protection unit; Buffer overflow; Field programmable gate arrays; Instruments; Logic; Multiprocessing systems; Network-on-a-chip; Protection; Prototypes; Security; Software testing; FPGA; MicroBlaze; Security; Stack Protection Unit;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW), 2010 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
978-1-4244-6533-0
Type :
conf
DOI :
10.1109/IPDPSW.2010.5470728
Filename :
5470728
Link To Document :
بازگشت