Title :
Optimization of device dimensions for high-performance low-power architecture blocks
Author :
Gemmeke, T. ; Gansen, M. ; Noll, T.G. ; Stockmanns, H.
Author_Institution :
Electr. Eng. & Comput. Syst., RWTH Aachen Univ., Germany
Abstract :
A strategy for the implementation of energy-efficient architecture blocks is proposed. In enables mapping of algorithms to architectures at maximal efficiency based on automized optimization of device dimensions of elementary basic cells. As an example, the design of a high-throughput low-power FIR-filter is described. The effectiveness of the proposed strategy is confirmed by comparison with state-of-the-art filter macros.
Keywords :
FIR filters; circuit optimisation; low-power electronics; algorithms mapping; automized optimization; device dimensions optimization; elementary basic cells; energy-efficient architecture blocks; filter macros; high-performance architecture blocks; high-throughput FIR-filter; low-power FIR-filter; low-power architecture blocks; maximal efficiency architecture; Adders; Circuits; Computer architecture; Degradation; Delay; Energy consumption; Finite impulse response filter; Silicon; Throughput; Transversal filters;
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
DOI :
10.1109/ESSCIRC.2003.1257133
