DocumentCode :
2447542
Title :
1.5V rail-to-rail programmable-gain CMOS amplifier
Author :
Ramírez-Angulo, Jaime ; López-Martín, Antonio J. ; Carvajal, Ramón G. ; Lackey, Chad
Author_Institution :
Klipsch Sch. of Electr. & Comput. Eng., New Mexico State Univ., Las Cruces, NM, USA
fYear :
2003
fDate :
16-18 Sept. 2003
Firstpage :
373
Lastpage :
376
Abstract :
A 1.5V programmable-gain differential amplifier is implemented using a novel design technique for operating closed-loop amplifier circuits at very low supply voltages. It is based on the use of quasi-floating gate transistors, avoiding issues encountered in true floating-gate structures such as the initial floating-gate charge, offset drift with temperature, and gain-bandwidth product degradation. A prototype fabricated in a 0.5-/spl mu/m CMOS technology shows a 0.6% THD for almost rail-to-rail outputs and a 4 MHz unity-gain bandwidth.
Keywords :
CMOS integrated circuits; closed loop systems; differential amplifiers; programmable circuits; 0.5 microns; 1.5 V; 4 MHz; CMOS technology; closed-loop amplifier circuits; design technique; floating-gate charge; floating-gate structures; gain-bandwidth product degradation; programmable-gain differential amplifier; quasifloating gate transistors; rail-to-rail programmable-gain CMOS amplifier; temperature offset drift; very low supply voltage; Bandwidth; CMOS technology; Circuits; Degradation; Differential amplifiers; Low voltage; Prototypes; Rail to rail amplifiers; Rail to rail outputs; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
Type :
conf
DOI :
10.1109/ESSCIRC.2003.1257150
Filename :
1257150
Link To Document :
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