From hybrid electro-photonic to all-optical on-chip interconnections for future CMPs

Wants to be an excursus on the different solutions in which an optical Network-on-Chip (NoC) could be applied to, starting from passive NoC topologies (Mesh/Torus) enhanced by a simple shared optical ring and moving to more complex all-optical reconfigurable networks, in a state-of-the-art coherence assisted Chip-Multi-Processor (CMP). We investigate performance and power consumption effects on a CMP comparing them against a standard electronic Mesh (passive) and both a standard Torus (electronic baseline) and an optical Torus with sequential path-setup done through a symmetric electronic helper network (optical baseline, active).