Analysis of a parallel grace hash join implementation on The Cell Processor

The Cell Processor is a widely-used processor type embedded into a wide variety of technical appliances, ranging from television sets and gaming consoles to high performance computing servers. Its high availability and cost efficiency makes it very interesting for computing tasks as parts of scientific and business workflows. In this paper we present an analysis of the implementation of a variant of one of the most important and effort consuming data management operation, the data join operator. Due to the parallel execution features of a Cell processor we focus specifically on a parallelized implementation of the Grace Hash Join.