• DocumentCode
    2448141
  • Title

    Trends in manufacturing test methods and their implications

  • Author

    Kundu, Sandip ; Mak, T.M. ; Galivanche, Rajesh

  • Author_Institution
    Design Technol., Intel Corp., USA
  • fYear
    2004
  • fDate
    26-28 Oct. 2004
  • Firstpage
    679
  • Lastpage
    687
  • Abstract
    Driven by market applications in the areas of computing, networking, storage, optical, wireless, portable, and consumer electronics, semiconductor chips today are as diverse as ever. Confluence of multiple applications and rapid integration has also driven the heterogeneity of chips. Test methods have evolved with the products. However, the basic goals in testing remain the same: quality of product, recurring and non-recurring costs and time to market. In this paper we try to catalog some commonly used test methods, identify their associated DFT requirements and trends in terms of tester requirements. Given the diversity of semiconductors chips today such as various PLDs, volatile and non-volatile memories, analog, mixed signal, FPGA, ASIC, SOC, MEMs and processors, it is impossible for a paper of this nature to be fully comprehensive. So we limit our focus on processor, ASIC and SOCs.
  • Keywords
    design for testability; microprocessor chips; system-on-chip; ASIC; DFT requirements; FPGA; MEM; PLD; SOC; manufacturing test methods; nonrecurring cost; nonvolatile memory; processors; product quality; recurring cost; semiconductors chips; tester requirements; time to market; volatile memory; Application specific integrated circuits; Computer networks; Consumer electronics; Costs; Manufacturing; Optical computing; Optical fiber networks; Portable computers; Semiconductor device manufacture; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2004. Proceedings. ITC 2004. International
  • Print_ISBN
    0-7803-8580-2
  • Type

    conf

  • DOI
    10.1109/TEST.2004.1387329
  • Filename
    1387329