Title :
A low power sample-and-hold amplifier
Author :
Tani, Hitoshi ; Fujimoto, Yoshihisa ; Maruyama, Masahiko ; Akada, Hiroyuki ; Ogawa, Hiroaki ; Miyamoto, Masayuki
Author_Institution :
Adv. Technol. Res. Labs., Sharp Corp., Nara, Japan
Abstract :
A novel power reduction technique is proposed for a sample-and-hold amplifier (SHA) with two stage operational amplifier. This technique improves the bandwidth and the slew rate of the SHA can be reduced. A variable gain amplifier (VGA) used in an analog-digital interface system for mega-pixel CCD image sensors is implemented. Fabricated in 0.25-/spl mu/m CMOS process with MIM capacitors, the VGA occupies 0.49 /spl times/ 0.49 mm/sup 2/ and dissipates 18.7 mW at 18 MHz with a supply voltage of 3.1 V.
Keywords :
CMOS analogue integrated circuits; MIM devices; analogue-digital conversion; low-power electronics; operational amplifiers; sample and hold circuits; CMOS process; MIM capacitors; SHA; analog-digital interface system; bandwidth; low power sample-and-hold amplifier; mega-pixel CCD image sensors; operational amplifier; power reduction technique; slew rate; variable gain amplifier; Analog-digital conversion; Bandwidth; Capacitors; Charge-coupled image sensors; Circuits; Energy consumption; Gain; Operational amplifiers; Power amplifiers; Signal sampling;
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
DOI :
10.1109/ESSCIRC.2003.1257176
