DocumentCode :
244878
Title :
Novel hardware acceleration techniques for finite difference time domain methods
Author :
Wenhua Yu ; Xiaoling Yang
Author_Institution :
2COMU, Inc., Fairfax, VA, USA
fYear :
2014
fDate :
3-8 Aug. 2014
Firstpage :
167
Lastpage :
169
Abstract :
In this paper, we introduce the architecture of Phi Coprocessor, programming techniques and acceleration techniques in the finite different time domain (FDTD) methods. Phi Coprocessor can be used as a regular CPU and run the EM code optimized for regular CPUs such as Intel Xeon E5 or AMD Opteron 6300 with slight code modifications. The examples will be for the acceleration of the parallel FDTD methods.
Keywords :
computational electromagnetics; coprocessors; finite difference time-domain analysis; EM code; Phi coprocessor architecture; acceleration technique architecture; finite different time domain method; novel hardware acceleration technique; parallel FDTD method; programming technique architecture; regular CPU; Acceleration; Coprocessors; Finite difference methods; Graphics processing units; Random access memory; Time-domain analysis; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetics in Advanced Applications (ICEAA), 2014 International Conference on
Conference_Location :
Palm Beach
Print_ISBN :
978-1-4799-7325-5
Type :
conf
DOI :
10.1109/ICEAA.2014.6903847
Filename :
6903847
Link To Document :
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