Title :
A VLIW architecture simulator innovative approach for HW-SW co-design
Author :
Barbieri, Ivano ; Bariani, Massimo ; Raggio, Marco
Author_Institution :
Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy
Abstract :
This document describes an innovative approach for simulating a DSP processor with VLIW architecture, the simulator structure and gives a performance comparison with a state of the art simulation tool. The simulation approach is based on a three-dimensional (phase, time, operation) representation of the pipeline in order to “grab”, in a certain time stamp, the complete processor status, taking into account the current status. This approach allows to accurately simulate the C6x behavior, reducing the simulation time compared with other available simulators. Moreover, the VLIW simulator dynamically generating the instruction set is a flexible tool for hardware-software co-design
Keywords :
Digital signal processing chips; Hardware-software codesign; Instruction sets; Multimedia computing; Parallel architectures; Virtual machines; 3D pipeline representation; C6x behavior; DSP processor simulation; VLIW architecture simulator; hardware-software co-design; time stamp; Bandwidth; Computational modeling; Computer aided instruction; Computer architecture; Consumer electronics; Digital signal processing; High level languages; Optimizing compilers; Time to market; VLIW;
Conference_Titel :
Multimedia and Expo, 2000. ICME 2000. 2000 IEEE International Conference on
Conference_Location :
New York, NY
Print_ISBN :
0-7803-6536-4
DOI :
10.1109/ICME.2000.871022
