DocumentCode
2448962
Title
Energy efficient CMOS microprocessor design
Author
Burd, Thomas D. ; Brodersen, Robert W.
Author_Institution
California Univ., Berkeley, CA, USA
Volume
1
fYear
1995
fDate
3-6 Jan 1995
Firstpage
288
Abstract
Reduction of power dissipation in microprocessor design is becoming a key design constraint. This is motivated not only by portable electronics, in which battery weight and size is critical, but by heat dissipation issues in larger desktop and parallel machines as well. By identifying the major modes of computation of these processors and by proposing figures of merit for each of these modes, a power analysis methodology is developed. It allows the energy efficiency of various architectures to be quantified, and provides techniques for either individually optimizing or trading off throughput and energy consumption. The methodology is then used to qualify three important design principles for energy-efficient microprocessor design
Keywords
CMOS digital integrated circuits; computer architecture; cooling; energy conservation; integrated circuit modelling; microprocessor chips; battery size; battery weight; computation modes; computer architectures; design principles; desktop computers; energy consumption; energy efficiency quantification; energy efficient CMOS microprocessor design; figures of merit; heat dissipation; parallel machines; portable electronics; power analysis methodology; power dissipation; throughput; Application software; Batteries; CMOS logic circuits; Capacitance; Computer architecture; Delay; Design methodology; Energy consumption; Energy efficiency; Microprocessors; Parallel machines; Power dissipation; Semiconductor device modeling; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
System Sciences, 1995. Proceedings of the Twenty-Eighth Hawaii International Conference on
Conference_Location
Wailea, HI
Print_ISBN
0-8186-6930-6
Type
conf
DOI
10.1109/HICSS.1995.375385
Filename
375385
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