DocumentCode
2449070
Title
Model and verification of triple-well shielding on substrate noise in mixed-signal CMOS ICs
Author
Rossi, Roberto ; Torelli, Guido ; Liberali, Valentino
Author_Institution
Dept. of Electron., Pavia Univ., Italy
fYear
2003
fDate
16-18 Sept. 2003
Firstpage
643
Lastpage
646
Abstract
In this work, the effect of triple-well shielding in mixed signal CMOS integrated circuits is studied. A test chip is presented that contains structures intended for investigation on substrate noise coupling. This paper shows experimental results, giving a rationale for them and providing design guidelines.
Keywords
CMOS integrated circuits; integrated circuit design; integrated circuit modelling; integrated circuit noise; mixed analogue-digital integrated circuits; mixed-signal CMOS IC; substrate noise coupling; test chip; triple-well shielding; CMOS technology; Circuit noise; Circuit testing; Clocks; Frequency; Integrated circuit noise; MOS devices; Noise measurement; Semiconductor device modeling; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location
Estoril, Portugal
Print_ISBN
0-7803-7995-0
Type
conf
DOI
10.1109/ESSCIRC.2003.1257217
Filename
1257217
Link To Document