Wideband LNA for a multistandard wireless receiver in 0.18 /spl mu/m CMOS

A differential wideband LNA for a multistandard receiver has been designed and implemented in 0.18/spl mu/m CMOS. The circuit topology is a two-stage amplifier with active feedback. The input stage is a common-source stage with a common-drain stage in the feedback loop for impedance matching. Bandwidth enhancement with inductive shunt-peaking is used for maximizing the bandwidth. Measurements on the fabricated device show a power gain of 13.1 dB and a 3-dB bandwidth of nearly 7 GHz together with an IIP3 and a 1-dB compression point of -4.7 dBm and -15.2 dBm respectively. The measured noise figures are 3.3 dB at 1 GHz and 5.5 dB at 6 GHz. Reported LNAs with similar performance are usually implemented with bipolar transistors or MESFETs.