fDate :
Oct. 31 2011-Nov. 2 2011
Abstract :
The following topics are dealt with: system-level performance simulation; moonrake chip GALS demonstrator; CMOS technology; customizable datapath integrated lock unit; instruction caching strategies; static analysis method; scratchpad aware mapping of streaming applications; MPSoC; Choleskv matrix decomposition; low-power arithmetic unit; network-on-chip benchmarking and coarse-grained reconfigurable protocol processor.
Keywords :
CMOS integrated circuits; cache storage; instruction sets; matrix decomposition; network-on-chip; CMOS technology; Choleskv matrix decomposition; MPSoC; coarse-grained reconfigurable protocol processor; customizable datapath integrated lock unit; instruction caching strategies; low-power arithmetic unit; moonrake chip GALS demonstrator; network-on-chip benchmarking; scratchpad aware mapping of streaming applications; static analysis method; system-level performance simulation;
Conference_Titel :
System on Chip (SoC), 2011 International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4577-0671-4
Electronic_ISBN :
978-1-4577-0670-7
DOI :
10.1109/ISSOC.2011.6089209
