DocumentCode
2449696
Title
Study of neutral point potential variation for three-level NPC inverter under fault condition
Author
Park, Jong-Je ; Kim, Tae-Jin ; Hyun, Dong-seok
Author_Institution
Dept. of Electr. Eng., Hanyang Univ., Seoul
fYear
2008
fDate
10-13 Nov. 2008
Firstpage
983
Lastpage
988
Abstract
Three-level Diode Clamped Multilevel Inverter, generally known as Neutral-Point-Clamped (NPC) Inverter, has an inherent problem causing Neutral Point (NP) potential variation. Until now, in many literatures NP potential problem has been investigated and lots of solutions have also been proposed. However, in the cases of fault and fault tolerant control state, distinctive feature of NP potential variation was rarely published from the standpoint of reliability. In this paper, NP potential is analytically investigated both normal and fault conditions under carrier based PWM. Subsequently, relation between fault detection time and size of capacitor is analyzed. This information is explored by simulation results, which contribute to enhance the reliability of inverter system.
Keywords
PWM invertors; power system faults; power system reliability; PWM; diode clamped multilevel inverter; fault conditions; neutral point clamped inverter; neutral point potential variation; reliability; Circuit faults; Control systems; Degradation; Fault detection; Fault tolerance; Power system reliability; Pulse width modulation inverters; Switched capacitor circuits; Switching circuits; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics, 2008. IECON 2008. 34th Annual Conference of IEEE
Conference_Location
Orlando, FL
ISSN
1553-572X
Print_ISBN
978-1-4244-1767-4
Electronic_ISBN
1553-572X
Type
conf
DOI
10.1109/IECON.2008.4758087
Filename
4758087
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