Is "design to production" the ultimate answer for jitter, noise, and BER challenges for multi GB/s ICs?

In ITC 2003, a panel entitled "Multi-GB/s IC Test Challenges and Solutions" was successfully conducted with the panelists came from IC manufacture, test & measurement, and ATE industries and academies. Outstanding questions and possible solutions were discussed and debated. It was the general view of the panel that the most important test requirements for multiple Gb/s ICs are timing jitter, amplitude noise, and BER and they are interrelated. However, the panel was divided by two distinct views on the issue of whether jitter, noise and BER (JNB) should be tested in production. The argument against JNB test in high volume manufacture (HVM) is primary based on costs and economics; while the argument in favor of HVM jitter is that it not possible to completely bound the JNB problem in design characterization and verification due to its statistical nature.