Panel synopsis - diagnosis meets physical failure analysis: how long can we succeed?

Debugging faulty devices is an undesirable but necessary task for yield improvement and design debug at first silicon. Production requires testing to reject faulty devices. Failure analysis identifies the sources of the defects that cause the failures of faulty devices. The main objective of this panel is to discuss the effectiveness of failure analysis in future silicon debugging. Failure analysis is completed by the cooperation between diagnosis and PFA (physical failure analysis). Failure analysis is modeled by the following steps: 1) from external signatures, a failure hypothesis that indicates suspicious parts is derived; 2) the suspected parts are observed and the failure hypothesis is confirmed by simulations, temporary fixes, or permanent fixes.