Panel 9 - diagnostics vs failure analysis

This work discusses about the opportunity for diagnostic tools and physical failure analysis. The failure of chip, cause for the failure, and its diagnostics are also focused. The diagnostic tools attempt to isolate the cause for the failure to a small enough area to enable identification of the physical defect that caused the chip to fail. Diagnostic tools typically work in a logic model environment. Existing ATPG technology is used to generate a test pattern that exercises a specific net repeatedly and quickly to enable data collection by a photon emission tool. This work also discusses about the virtual failure analysis, which has the capability to identify defects on failing die without the PFA lab, through the use of inline defect data, and whatever other means are possible.