A study of polarization effects in Metal-Ferroelectric-Oxide-Semiconductor Capacitors

In this paper we report the fabrication and detailed electrical characterization of a metal-ferroelectric-oxide-semiconductor capacitor aiming at the extraction of the polarization characteristic. In order to evaluate the electrical performances of the ferroelectric over SiO₂ capacitor, we propose a simple device test structure featuring an intermediate contact between the two insulators. The investigated test structures are fabricated on highly doped silicon with a gate stack including 40 nm silicon dioxide, 100 nm Pt intermediate contact, 160 nm P(VDF-TrFE) and Au as a top contact. Based on voltage measurements and using an analytical model, we subsequently extract the polarization curves without the need of capacitive measurements. The proposed test structure can serve the future experimental investigation of the possible negative capacitances in complex ferroelectric gate stacks.