DocumentCode :
2451989
Title :
Development of an optimised 40 V pDMOS device by use of a TCAD design of experiment methodology
Author :
Moens, P. ; Tack, M. ; Van Hove, H. ; Vermandel, M. ; Bolognesi, D.
Author_Institution :
Alcatel Microelecron., Oudenaarde, Belgium
fYear :
2000
fDate :
2000
Firstpage :
276
Lastpage :
279
Abstract :
A new medium voltage (40-60 V) pDMOS device has been developed and optimized through the use of a design of experiment (DOE) approach based on TCAD simulations and experimental verification. Layout parameters are varied and the electrical characteristics of the device (e.g. Vbd , specific on-resistance, etc.) together with hot carrier behaviour, are studied as responses. In this way, an optimal device was selected
Keywords :
MIS devices; design of experiments; hot carriers; optimisation; power semiconductor devices; semiconductor device breakdown; semiconductor device measurement; semiconductor device models; technology CAD (electronics); 40 to 60 V; Alcatel intelligent interface technology; TCAD design of experiment methodology; TCAD simulation; breakdown voltage; device electrical characteristics; experimental verification; hot carrier behaviour; layout parameters; medium voltage pDMOS device; optimal device selection; optimised pDMOS device; smart power; specific on-resistance; CMOS technology; Design methodology; Design optimization; Electric breakdown; Electric resistance; Electric variables; Isolation technology; Medium voltage; Microelectronics; US Department of Energy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2000. SISPAD 2000. 2000 International Conference on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-6279-9
Type :
conf
DOI :
10.1109/SISPAD.2000.871262
Filename :
871262
Link To Document :
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