• DocumentCode
    2452497
  • Title

    Using Level Restoring Method for Dual Supply Voltage

  • Author

    Emadi, M. ; Farbiz, F. ; Sadeghi, K.H. ; Jafargholi, A.

  • Author_Institution
    VLSI Lab., Sharif Univ. of Technol., Tehran
  • fYear
    2006
  • fDate
    26-29 Oct. 2006
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A new level converter for use in dual voltage SOI digital circuits is presented. The technique which uses the idea of keeper transistors, consumes less power compared to the traditional methods. The effects of load capacitance on the circuit are studied by extensive simulations.
  • Keywords
    power supply circuits; dual supply voltage; dual voltage SOI digital circuits; keeper transistors; level converter; level restoring method; load capacitance; Capacitance; Clustering algorithms; Delay; Digital circuits; Dynamic voltage scaling; Energy consumption; Low voltage; Static power converters; Threshold voltage; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Antennas, Propagation & EM Theory, 2006. ISAPE '06. 7th International Symposium on
  • Conference_Location
    Guilin
  • Print_ISBN
    1-4244-0162-3
  • Electronic_ISBN
    1-4244-0163-1
  • Type

    conf

  • DOI
    10.1109/ISAPE.2006.353294
  • Filename
    4168335
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2452497