Joint SW/HW Modelling and Design Exploration Using P-Ware

The introduction of high-performance applications such as multimedia applications into embedded systems led the manufacturers to provide embedded platforms able to offer an important computing power which makes it possible to answer the increasing requirements of future evolutions of these applications. One of the adopted solutions is the use of multiprocessor platforms. In this paper, we present a joint SW/HW design exploration methodology for multiprocessor embedded systems. The system model relies on transaction-level component-based models for modelling parallel SW and multiprocessor HW. Our proposal comprises three points. First of all we present a SW model which is independent from execution platforms. Second, we propose a SW-level scheduler constraints synthesis technique. Third, we present an exploratory HW-level placement method. The methodology has the advantage of combining real-time requirements of SW with effective exploitation of multiprocessor HW.