DocumentCode
2454397
Title
Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition
fYear
2002
fDate
8-8 March 2002
Abstract
The following topics are dealt with: semiconductor IP; formal verification; cooling; power management; defect oriented test; SAT and BDD techniques; low power design; mixed signal test; collaborative design; logic synthesis; symbolic techniques; EDA tools; analogue circuits; asynchronous circuits; BIST; DFT; co-design; SoC; embedded systems; reconfigurable architectures; analogue modelling; object oriented design; interconnect modelling; fault tolerance; ATPG; high-level synthesis; and IC modelling.
Keywords
VLSI; analogue circuits; application specific integrated circuits; asynchronous circuits; automatic test pattern generation; built-in self test; cooling; design for testability; electronic design automation; embedded systems; fault tolerance; formal verification; hardware-software codesign; industrial property; integrated circuit interconnections; integrated circuit modelling; logic CAD; low-power electronics; mixed analogue-digital integrated circuits; object-oriented methods; reconfigurable architectures; ATPG; BDD; BIST; DFT; EDA tools; IC modelling; SAT; SoC; analogue circuits; analogue modelling; asynchronous circuits; co-design; collaborative design; cooling; defect oriented test; embedded systems; fault tolerance; formal verification; high-level synthesis; interconnect modelling; logic synthesis; low power design; mixed signal test; object oriented design; power management; reconfigurable architectures; semiconductor IP; symbolic techniques; Very-large-scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location
Paris, France
ISSN
1530-1591
Print_ISBN
0-7695-1471-5
Type
conf
DOI
10.1109/DATE.2002.998238
Filename
998238
Link To Document