DocumentCode
2454543
Title
Energy optimization of distributed embedded processors by combined data compression and functional partitioning
Author
Liu, Jinfeng ; Chou, Pai H.
Author_Institution
Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA
fYear
2003
fDate
9-13 Nov. 2003
Firstpage
201
Lastpage
208
Abstract
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. However, data compression alone may not be effective unless coordinated with functional partitioning. This paper presents a dynamic programming technique that combines compression and functional partitioning to minimize energy on multiple voltage-scalable processors running pipelined data-regular applications under performance constraints. Our algorithm computes the optimal functional partitioning, CPU speed for each node, and their respective compression ratios. We validate the algorithm´s effectiveness on a real distributed embedded system running an image processing algorithm.
Keywords
data compression; dynamic programming; embedded systems; logic partitioning; CPU speed; DVS; compression ratios; data compression; distributed embedded processors; dynamic programming technique; dynamic voltage scaling; energy optimization; functional partitioning; image processing algorithm; interprocessor communication traffic; multiple voltage scalable processors; pipelined data regular applications; real distributed embedded systems; Compression algorithms; Data compression; Dynamic voltage scaling; Embedded computing; Embedded system; Image coding; Message passing; Parallel processing; Partitioning algorithms; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Aided Design, 2003. ICCAD-2003. International Conference on
Conference_Location
San Jose, CA, USA
Print_ISBN
1-58113-762-1
Type
conf
DOI
10.1109/ICCAD.2003.1257637
Filename
1257637
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