DocumentCode
245470
Title
BOB-router: A new buffering-aware global router with over-the-block routing resources optimization
Author
Yilin Zhang ; Chowdhury, Shuvro ; Pan, David Z.
Author_Institution
Dept. of ECE, Univ. of Texas at Austin, Austin, TX, USA
fYear
2014
fDate
20-23 Jan. 2014
Firstpage
513
Lastpage
518
Abstract
In this paper, we propose a new global router, BOB-Router, endowed with the ability to use over-the-block routing resources to the greatest extent in addition to traditional routing concepts of minimizing wirelength, via count and overflow. In previous global routing formulations, the routing resources over the IP blocks were either dealt as routing blockages leading to a significant waste, or simply treated in the same way as outside-the-block routing resources, which violates the slew constraints and thus fail buffering. Utilizing over-the-block routing resources could dramatically improve the routing solution, yet requires special attention, since the slew, affected by different RC on different metal layers, must be constrained by buffering and is easily violated. Moreover, even all nets are slew-legalized, the routing solution could still suffer from heavy congestion problem. For the first time, BOB-Router tries to solve the over-the-block global routing problem through minimizing overflows, wirelength and via count simultaneously without violating slew constraints. BOB-Router generates a slew-legalized initial solution followed by a Lagrangian-multiplier-based pricing phase and RC-constrained A* search to help explore new buffering-aware topologies on all metal layers. Our experimental results show that BOB-Router completely satisfies the slew constraints and significantly outperforms the obstacle-avoiding global routers in terms of wirelength, via count and overflows.
Keywords
buffer circuits; circuit optimisation; microprocessor chips; network routing; search problems; BOB-router; IP blocks; Lagrangian-multiplier-based pricing; RC-constrained A* search; buffering-aware global router; buffering-aware topology; metal layers; obstacle-avoiding global routers; outside-the-block routing resources; over-the-block global routing resource problem; over-the-block routing resource optimization; routing blockages; slew constraints; slew-legalized initial solution; via count; via overflows; wireleng minimization; Benchmark testing; Law; Metals; Routing; Steiner trees; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific
Conference_Location
Singapore
Type
conf
DOI
10.1109/ASPDAC.2014.6742943
Filename
6742943
Link To Document