• DocumentCode
    2455022
  • Title

    Low capacitance approaches for 22nm generation Cu interconnect

  • Author

    Bao, T.I. ; Chen, H.C. ; Lee, C.J. ; Lu, H.H. ; Shue, S.L. ; Yu, C.H.

  • Author_Institution
    Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan
  • fYear
    2009
  • fDate
    27-29 April 2009
  • Firstpage
    51
  • Lastpage
    56
  • Abstract
    Various integration approaches, including homogeneous porous Low-k and air gaps, for low-capacitance solution were investigated for 22 nm Cu interconnect technology and beyond. For homogeneous Low-k approach, K=2.0 Low-k material is successfully integrated with Cu. Up to 15% line to line capacitance reduction compared with LK-1 (K= 2.5) was demonstrated by a damage-less etching and CMP process. For air gap approach, a cost-effective and Selective air gaps formation process was developed. Air gaps are selectively formed only at narrow spacing between conduction lines without additional processes.
  • Keywords
    capacitance; chemical mechanical polishing; integrated circuit interconnections; Cu; Cu interconnect technology; air gap approach; conduction lines; low capacitance approaches; Air gaps; Capacitance; Dielectric constant; Etching; Materials science and technology; Semiconductor device manufacture; Semiconductor materials; Slurries; Surface resistance; Thermal degradation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    978-1-4244-2784-0
  • Electronic_ISBN
    1524-766X
  • Type

    conf

  • DOI
    10.1109/VTSA.2009.5159288
  • Filename
    5159288