Title :
System-level design tools for RF communication ICs
Author :
Gielen, Georges G E
Author_Institution :
Katholieke Univ., Leuven, Belgium
fDate :
29 Sep-2 Oct 1998
Abstract :
The progress in VLSI technology allows the integration of complex heterogeneous systems on a chip. In order to boost the design productivity and guarantee the optimality of such systems while meeting the time to market constraints, a systematic top-down design approach has to be followed with sufficient time and attention paid to system-level architectural design before proceeding to the detailed block design. This paper presents a system exploration tool for telecom applications. This tool allow to analyze and compare alternative RF system architectures and provides quantitative data to support important design decisions and trade-offs such as analog-digital partitioning. This is illustrated with several experimental results
Keywords :
VLSI; circuit CAD; high level synthesis; integrated circuit design; radio receivers; RF communication IC; RF receiver front-ends; RF system architectures; VLSI technology; analog-digital partitioning; design productivity; experimental results; heterogeneous systems integration; high-level design; system exploration tool; system-level architectural design; system-level design tools; systematic top-down design; telecom applications; time to market constraints; Analog integrated circuits; Analog-digital conversion; Design methodology; Productivity; Radio frequency; Silicon; System-level design; System-on-a-chip; Time to market; Very large scale integration;
Conference_Titel :
Signals, Systems, and Electronics, 1998. ISSSE 98. 1998 URSI International Symposium on
Conference_Location :
Pisa
Print_ISBN :
0-7803-4900-8
DOI :
10.1109/ISSSE.1998.738109
