Title :
Suppressing test inflation in shared-memory parallel Automatic Test Pattern Generation
Author :
Ku, Jerry C. Y. ; Huang, Ryan H.-M ; Lin, Louis Y.-Z ; Wen, Charles H.-P
Author_Institution :
Dept. of Elec. Comp. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
Multi-core machines enable the possibility of parallel computing in Automatic Test Pattern Generation (ATPG). With sufficient computing power, previously proposed parallel ATPG has reached near linear speedup. However, test inflation in parallel ATPG yet arises as a critical problem and limits its practicality. Therefore, we developed a parallel ATPG system that incorporates (1) concurrent interruption (CI), (2) ripple compaction (RC) and (3) fan-in-cone based fault ordering (FIC) to deal with such problem. Concurrent interruption aborts test generation on simultaneously detected faults by fault simulation. Ripple compaction combines tests for different faults while fan-in-cone based fault ordering strategically arranges the fault list to reduce the number of test generations and thus speeds up the ATPG process. According to our experiments, the proposed parallel ATPG system effectively reduces 11% pattern count and achieves ~0% test inflation while maintaining an average of 6.5X speedup with no attenuation in fault coverage on experimental circuits.
Keywords :
automatic test pattern generation; fault diagnosis; fault tolerant computing; interrupts; parallel machines; shared memory systems; automatic test pattern generation; concurrent interruption; fan-in-cone based-fault ordering; fault coverage; fault detection; fault simulation; multicore machine; parallel ATPG system; ripple compaction; shared memory system; test inflation suppression; Automatic test pattern generation; Circuit faults; Compaction; Interrupters; Logic gates; Parallel processing; Program processors;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific
Conference_Location :
Singapore
DOI :
10.1109/ASPDAC.2014.6742967